121 search results - page 22 / 25 » A cell-based power estimation in CMOS combinational circuits |
ISLPED
2009
ACM
14 years 1 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
In a CMOS combinational logic circuit, the subthreshold leakage current in the standby state depends on the state of the inputs. In this paper we present a new approach to identif...
TVLSI
2010
13 years 2 months ago
2010
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
CHES
2006
Springer
13 years 11 months ago
2006
Springer
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...