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» A comparative study of power efficient SRAM designs
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BMCBI
2008
187views more  BMCBI 2008»
13 years 7 months ago
PSAT: A web tool to compare genomic neighborhoods of multiple prokaryotic genomes
Background: The conservation of gene order among prokaryotic genomes can provide valuable insight into gene function, protein interactions, or events by which genomes have evolved...
Christine Fong, Laurence Rohmer, Matthew Radey, Mi...
CODES
2005
IEEE
13 years 9 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
14 years 1 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
DAC
2003
ACM
14 years 8 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He
ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
14 years 4 months ago
Vdd programmability to reduce FPGA interconnect power
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Fei Li, Yan Lin, Lei He