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» A decoupled KILO-instruction processor
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ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
14 years 3 months ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
14 years 2 months ago
Reducing register ports for higher speed and lower energy
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
Il Park, Michael D. Powell, T. N. Vijaykumar
DAC
2000
ACM
14 years 10 months ago
Synthesis and optimization of coordination controllers for distributed embedded systems
A main advantage of control composition with modal processes [4] is the enhanced retargetability of the composed behavior over a wide variety of target architectures. Unlike previ...
Pai H. Chou, Gaetano Borriello
ESA
2004
Springer
166views Algorithms» more  ESA 2004»
14 years 3 months ago
Super Scalar Sample Sort
Sample sort, a generalization of quicksort that partitions the input into many pieces, is known as the best practical comparison based sorting algorithm for distributed memory para...
Peter Sanders, Sebastian Winkel
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 9 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...