105 search results - page 11 / 21 » A gate resizing technique for high reduction in power consum... |
PACS
2000
Springer
13 years 12 months ago
2000
Springer
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
AHS
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
VLSID
2009
IEEE
14 years 9 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temper...