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ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
14 years 5 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
14 years 2 months ago
Symbolic Reliability Analysis and Optimization of ECU Networks
Increasing reliability at a minimum amount of extra cost is a major challenge in todays ECU network design. Considering reliability as an objective already in early design phases ...
Michael Glaß, Martin Lukasiewycz, Felix Reim...
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
14 years 5 days ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich
ASAP
2009
IEEE
119views Hardware» more  ASAP 2009»
13 years 11 months ago
A Low Power High Performance Radix-4 Approximate Squaring Circuit
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
Satyendra R. Datla, Mitchell A. Thornton, David W....
CARDIS
2008
Springer
105views Hardware» more  CARDIS 2008»
13 years 10 months ago
Fast Hash-Based Signatures on Constrained Devices
Digital signatures are one of the most important applications of microprocessor smart cards. The most widely used algorithms for digital signatures, RSA and ECDSA, depend on finite...
Sebastian Rohde, Thomas Eisenbarth, Erik Dahmen, J...