1013 search results - page 123 / 203 » A hardware implementation of realloc function |
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Cost effective SOC test strongly hinges on parallel, independent test of SOC cores, which can only be ensured through proper core isolation techniques. While a core isolation mech...
ISQED
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
FCCM
2005
IEEE
14 years 1 months ago
2005
IEEE
As technology sizes decrease and die area increases, designers are creating increasingly complex computing systems using FPGAs. To reduce design time for new products, the reuse o...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...