1013 search results - page 18 / 203 » A hardware implementation of realloc function |
FPL
2004
Springer
14 years 1 months ago
2004
Springer
ASIPs and reconfigurable processors are architectural choices to extend the capabilities of a given processor. ASIPs suffer from fixed hardware after design, while ASIPs and reconf...
ISSS
2002
IEEE
14 years 21 days ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Cryptographic embedded systems are vulnerable to Differential Power Analysis (DPA) attacks. In this paper, we propose a logic design style, called as Precharge Masked Reed-Muller ...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...