90 search results - page 2 / 18 » A low power FPGA routing architecture |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
ASPDAC
2011
ACM
12 years 11 months ago
2011
ACM
—This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
Low energy and small switch area usage are two of the important design objectives in FPGA global routing architecture design. This paper presents an improved MCF model based CAD ï...
FPL
2009
Springer
13 years 12 months ago
2009
Springer
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...