172 search results - page 7 / 35 » A multiprocessor architecture for the massively parallel mod... |
ICS
2001
Tsinghua U.
13 years 11 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
SPAA
1990
ACM
13 years 11 months ago
1990
ACM
Multithreading has been proposed as an architectural strategy for tolerating latency in multiprocessors and, through limited empirical studies, shown to offer promise. This paper ...
IPPS
2003
IEEE
14 years 8 days ago
2003
IEEE
Advances in fabrication techniques are now enabling new hybrid CPU/FPGA computing resources to be integrated onto a single chip. While these new hybrids promise significant perfor...