405 search results - page 20 / 81 » A novel cache architecture with enhanced performance and sec... |
ASPLOS
1991
ACM
13 years 11 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
ICC
2007
IEEE
14 years 1 months ago
2007
IEEE
—Frequency hopping systems have been widely used in military communications to prevent hostile jamming, interception and detection. In traditional frequency hopping (FH) systems,...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
DATE
2010
IEEE
14 years 18 days ago
2010
IEEE
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
TVLSI
2010
13 years 2 months ago
2010
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...