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» A performance tuning methodology with compiler support
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WEA
2005
Springer
176views Algorithms» more  WEA 2005»
14 years 28 days ago
High-Performance Algorithm Engineering for Large-Scale Graph Problems and Computational Biology
Abstract. Many large-scale optimization problems rely on graph theoretic solutions; yet high-performance computing has traditionally focused on regular applications with high degre...
David A. Bader
DAC
2001
ACM
14 years 8 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
ISCAPDCS
2007
13 years 9 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
DAC
2008
ACM
14 years 8 months ago
Latency and bandwidth efficient communication through system customization for embedded multiprocessors
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
Chenjie Yu, Peter Petrov
ICCD
2003
IEEE
167views Hardware» more  ICCD 2003»
14 years 4 months ago
Virtual Page Tag Reduction for Low-power TLBs
We present a methodology for a power-optimized, software-controlled Translation Lookaside Buffer (TLB) organization. A highly reduced number of Virtual Page Number (VPN) bits sufï...
Peter Petrov, Alex Orailoglu