Sciweavers

420 search results - page 17 / 84
» A pseudo-hierarchical methodology for high performance micro...
Sort
View
ECBS
2005
IEEE
93views Hardware» more  ECBS 2005»
14 years 2 months ago
Embedded System Engineering Using C/C++ Based Design Methodologies
This paper analyzes and compares the effectiveness of various system level design methodologies in assessing performance of embedded computing systems from the earliest stages of ...
Claudio Talarico, Aseem Gupta, Ebenezer Peter, Jer...
EMSOFT
2005
Springer
14 years 2 months ago
High performance annotation-aware JVM for Java cards
Early applications of smart cards have focused in the area of personal security. Recently, there has been an increasing demand for networked, multi-application cards. In this new ...
Ana Azevedo, Arun Kejariwal, Alexander V. Veidenba...
TVLSI
2010
13 years 3 months ago
A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
Hamed F. Dadgour, Kaustav Banerjee
DAC
1999
ACM
14 years 28 days ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...
APCCAS
2006
IEEE
256views Hardware» more  APCCAS 2006»
14 years 2 months ago
Asynchronous Design Methodology for an Efficient Implementation of Low power ALU
— We present a design technique for implementing asynchronous ALUs with CMOS domino logic and delay insensitive dual rail four-phase logic. It ensures economy in silicon area and...
P. Manikandan, B. D. Liu, L. Y. Chiou, G. Sundar, ...