Sciweavers

420 search results - page 40 / 84
» A pseudo-hierarchical methodology for high performance micro...
Sort
View
ISPASS
2005
IEEE
14 years 2 months ago
Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, L...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 1 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
ACMACE
2009
ACM
13 years 6 months ago
Dramaturgies of PLACE: evaluation, embodiment and performance in PLACE-Hampi
This paper examines an extensive user evaluation survey undertaken during an installation of PLACE-Hampi, a custombuilt augmented stereoscopic panoramic interactive cultural herit...
Sarah Kenderdine, Jeffrey Shaw, Anita Kocsis
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
14 years 1 months ago
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
André Seznec, Stephen Felix, Venkata Krishn...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
14 years 20 days ago
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...