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ISVLSI
2005
IEEE
129views VLSI» more  ISVLSI 2005»
14 years 1 months ago
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
14 years 1 days ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
ISQED
2006
IEEE
109views Hardware» more  ISQED 2006»
14 years 1 months ago
Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective
As a result of aggressive technology scaling, gate leakage (gate oxide direct tunneling) has become a major component of total power dissipation. Use of dielectrics of higher perm...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
DATE
2002
IEEE
82views Hardware» more  DATE 2002»
14 years 18 days ago
Dynamic Scheduling and Clustering in Symbolic Image Computation
The core computation in BDD-based symbolic synthesis and verification is forming the image and pre-image of sets of states under the transition relation characterizing the sequen...
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
13 years 12 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak