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» A snap-on placement tool
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DATE
2002
IEEE
102views Hardware» more  DATE 2002»
14 years 18 days ago
Improving Placement under the Constant Delay Model
In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently compute...
Kolja Sulimma, Wolfgang Kunz, Ingmar Neumann, Luka...
DAC
2000
ACM
14 years 13 hour ago
Block placement with symmetry constraints based on the O-tree non-slicing representation
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorpl...
Yingxin Pang, Florin Balasa, Koen Lampaert, Chung-...
FCCM
2008
IEEE
115views VLSI» more  FCCM 2008»
14 years 2 months ago
Simultaneous Retiming and Placement for Pipelined Netlists
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
Kenneth Eguro, Scott Hauck
DAC
2011
ACM
12 years 7 months ago
Thermal-aware cell and through-silicon-via co-placement for 3D ICs
Existing thermal-aware 3D placement methods assume that the temperature of 3D ICs can be optimized by properly distributing the power dissipations, and ignoring the heat conductiv...
Jason Cong, Guojie Luo, Yiyu Shi
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 1 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin