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GLVLSI
2007
IEEE
106views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Floorplan repair using dynamic whitespace management
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
Kristofer Vorwerk, Andrew A. Kennings, Doris T. Ch...
ICCAD
2000
IEEE
99views Hardware» more  ICCAD 2000»
14 years 2 days ago
On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools
The incremental, “construct by correction” design methodology has become widespread in constraint-dominated DSM design. We study the problem of ECO for physical design domains...
Andrew B. Kahng, Stefanus Mantik
TCAD
2010
118views more  TCAD 2010»
13 years 2 months ago
Design Tools for Digital Microfluidic Biochips: Toward Functional Diversification and More Than Moore
Abstract--Microfluidics-based biochips enable the precise control of nanoliter volumes of biochemical samples and reagents. They combine electronics with biology, and they integrat...
Krishnendu Chakrabarty, Richard B. Fair, Jun Zeng
FPL
2007
Springer
178views Hardware» more  FPL 2007»
14 years 1 months ago
Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavl...
ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
13 years 12 months ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...