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ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Interconnect capacitance estimation for FPGAs
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Jason Helge Anderson, Farid N. Najm
FPL
2004
Springer
103views Hardware» more  FPL 2004»
14 years 1 months ago
JHDLBits: The Merging of Two Worlds
Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits wi...
Alexandra Poetter, Jesse Hunter, Cameron Patterson...
ACSC
2003
IEEE
14 years 29 days ago
User Hints for Map Labelling
The Map Labelling Problem appears in several applications, mainly in Cartography. Although much research on this problem has been done, it is interesting to note that map-labellin...
Hugo A. D. do Nascimento, Peter Eades
ASAP
2003
IEEE
108views Hardware» more  ASAP 2003»
14 years 29 days ago
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
Terry Tao Ye, Giovanni De Micheli
ISMAR
2002
IEEE
14 years 17 days ago
MR Platform: A Basic Body on Which Mixed Reality Applications Are Built
This paper describes a platform package, called “MR Platform,” which we have been implementing for research and development of augmented reality technology and applications. T...
Shinji Uchiyama, Kazuki Takemoto, Kiyohide Satoh, ...