88 search results - page 13 / 18 » A succinct memory model for automated design debugging |
DAC
2009
ACM
14 years 7 months ago
2009
ACM
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first star...
DAC
2008
ACM
14 years 7 months ago
2008
ACM
1 Soft errors induced by radiation are an increasing problem in the microelectronic field. Although traditional models estimate the reliability of memories suffering Single Event U...
DAC
1998
ACM
14 years 7 months ago
1998
ACM
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
HPDC
2010
IEEE
13 years 7 months ago
2010
IEEE
Automated analysis of unstructured text documents (e.g., web pages, newswire articles, research publications, business reports) is a key capability for solving important problems ...
DAC
2006
ACM
14 years 7 months ago
2006
ACM
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...