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» A technique for minimizing power during FPGA placement
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CORR
2006
Springer
108views Education» more  CORR 2006»
13 years 7 months ago
Static Analysis using Parameterised Boolean Equation Systems
The well-known problem of state space explosion in model checking is even more critical when applying this technique to programming languages, mainly due to the presence of complex...
María-del-Mar Gallardo, Christophe Joubert,...
ICCAD
2005
IEEE
132views Hardware» more  ICCAD 2005»
14 years 29 days ago
Battery optimization vs energy optimization: which to choose and when?
— Batteries are non-ideal energy sources – minimizing the energy consumption of a battery-powered system is not equivalent to maximizing its battery life. We propose an alterna...
Ravishankar Rao, Sarma B. K. Vrudhula
CODES
2007
IEEE
14 years 1 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
ICCAD
2010
IEEE
125views Hardware» more  ICCAD 2010»
13 years 5 months ago
Peak current reduction by simultaneous state replication and re-encoding
Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a str...
Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
DAC
2006
ACM
14 years 8 months ago
Optimality study of resource binding with multi-Vdds
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
Deming Chen, Jason Cong, Yiping Fan, Junjuan Xu