80 search results - page 3 / 16 » ALBORZ: Address Level Bus Power Optimization |
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
In modern embedded systems including communication and multimedia applications, large fraction of power is consumed during memory access and data transfer. Thus, buses should be d...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
DATE
2002
IEEE
13 years 12 months ago
2002
IEEE
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...