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» Accuracy-Adaptive Simulation of Transaction Level Models
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DATE
2005
IEEE
164views Hardware» more  DATE 2005»
13 years 10 months ago
Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho S...
ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
14 years 19 days ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay
MASCOTS
2000
13 years 9 months ago
A Transaction-Level Tool for Predicting TCP Performance and for Network Engineering
Most network engineering tools are unsatisfactory. Measurements are not predictive, simulations do not scale, and analysis is limited to oversimplified models. To be more useful, ...
Jean C. Walrand
DAC
2006
ACM
14 years 1 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
DATE
2006
IEEE
119views Hardware» more  DATE 2006»
14 years 2 months ago
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf