77 search results - page 3 / 16 » Accurate models for estimating area and power of FPGA implem... |
ISLPED
1996
ACM
13 years 11 months ago
1996
ACM
Estimation of the area complexity of a Boolean function from its functional description is an important step towards a power estimation capability at the register transfer level (...
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
ICCAD
2008
IEEE
13 years 1 months ago
2008
IEEE
Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been pr...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
FPGA
1999
ACM
13 years 11 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...