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118
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ISQED
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
92
Voted
DATE
2010
IEEE
15 years 9 months ago
2010
IEEE
—Recent research has shown that different defects can manifest themselves as failures at different temperature spectra. Therefore, we need multi-temperature testing which applies...
133
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
139
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ICCAD
2000
IEEE
15 years 8 months ago
2000
IEEE
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
127
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ISQED
2000
IEEE
15 years 8 months ago
2000
IEEE
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...