119 search results - page 14 / 24 » Algorithmic and Architectural Design Methodology for Particl... |
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
GECCO
2006
Springer
13 years 11 months ago
2006
Springer
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
ASAP
2007
IEEE
13 years 8 months ago
2007
IEEE
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...