Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
—Despite many technology advances, the limited computing power of sensors encumber them from taking part in service-oriented architectures. In recent years, the sensornetworking ...
We have been developing Rogue, an architecture that integrates high-level planning with a low-level executing robotic agent. Rogue is designed as the oce gofer task planner for X...