142 search results - page 15 / 29 » An Algorithm for Locating Logic Design Errors |
MOBISYS
2006
ACM
14 years 8 months ago
2006
ACM
Location determination of mobile users within a building has attracted much attention lately due to its many applications in mobile networking including network intrusion detectio...
DAC
2010
ACM
14 years 10 days ago
2010
ACM
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
VTS
2005
IEEE
14 years 2 months ago
2005
IEEE
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
SLIP
2003
ACM
14 years 1 months ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...