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» An Analog Integrated Circuit Design Laboratory
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ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 4 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
DAC
2006
ACM
14 years 1 months ago
Tomorrow's analog: just dead or just different?
This panel discusses the following topics. With the ongoing trend towards more and more digitization in applications ranging from multimedia to telecommunications, there is a big ...
Shekhar Y. Borkar, Robert W. Brodersen, Jue-Hsien ...
DATE
2002
IEEE
151views Hardware» more  DATE 2002»
14 years 18 days ago
Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets
In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These set...
Robert Schwencker, Frank Schenkel, Michael Pronath...
ICCAD
2001
IEEE
217views Hardware» more  ICCAD 2001»
14 years 4 months ago
ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
Michael Krasnicki, Rodney Phelps, James R. Hellums...
CHINAF
2006
110views more  CHINAF 2006»
13 years 7 months ago
Time-domain analysis methodology for large-scale RLC circuits and its applications
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
Zuying Luo, Yici Cai, Sheldon X.-D. Tan, Xianlong ...