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» An Analytical Model of Multistage Interconnection Networks
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DATE
2005
IEEE
108views Hardware» more  DATE 2005»
14 years 1 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
NOCS
2009
IEEE
14 years 2 months ago
Silicon-photonic clos networks for global on-chip communication
Future manycore processors will require energyefficient, high-throughput on-chip networks. Siliconphotonics is a promising new interconnect technology which offers lower power, h...
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Sco...
EDCC
2010
Springer
14 years 10 days ago
Dependability Analysis of Diffusion Protocols in Wireless Networks with Heterogeneous Node Capabilities
Wireless networks are starting to be populated by interconnected devices that reveal remarkable hardware and software differences. This fact raises a number of questions on the ap...
Paolo Masci, Silvano Chiaradonna, Felicita Di Gian...
CLUSTER
2003
IEEE
14 years 25 days ago
Performance Analysis of Java Message-Passing Libraries on Fast Ethernet, Myrinet and SCI Clusters
The use of Java for parallel programming on clusters according to the message-passing paradigm is an attractive choice. In this case, the overall application performance will larg...
Guillermo L. Taboada, Juan Touriño, Ramon D...
GLOBECOM
2009
IEEE
14 years 2 months ago
Hierarchical Network Formation Games in the Uplink of Multi-Hop Wireless Networks
— In this paper, we propose a game theoretic approach to tackle the problem of the distributed formation of the hierarchical network architecture that connects the nodes in the u...
Walid Saad, Quanyan Zhu, Tamer Basar, Zhu Han, Are...