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» An Architecture for Exploring Large Design Spaces
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CVPR
2005
IEEE
14 years 9 months ago
Learning a Similarity Metric Discriminatively, with Application to Face Verification
We present a method for training a similarity metric from data. The method can be used for recognition or verification applications where the number of categories is very large an...
Sumit Chopra, Raia Hadsell, Yann LeCun
DAC
1999
ACM
14 years 8 months ago
Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization
Partitioning and clustering are crucial steps in circuit layout for handling large scale designs enabled by the deep submicron technologies. Retiming is an important sequential lo...
Jason Cong, Honching Li, Chang Wu
ASPLOS
2006
ACM
13 years 11 months ago
Accurate and efficient regression modeling for microarchitectural performance and power prediction
We propose regression modeling as an efficient approach for accurately predicting performance and power for various applications executing on any microprocessor configuration in a...
Benjamin C. Lee, David M. Brooks
ICCAD
2004
IEEE
158views Hardware» more  ICCAD 2004»
14 years 4 months ago
DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
Deming Chen, Jason Cong
CSREAESA
2006
13 years 9 months ago
Static Program Partitioning for Embedded Processors
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
Bageshri Sathe, Uday P. Khedker