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DAC
2006
ACM
16 years 6 months ago
Standard cell characterization considering lithography induced variations
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
Ke Cao, Sorin Dobre, Jiang Hu
FDL
2003
IEEE
15 years 11 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
ECCV
2008
Springer
15 years 7 months ago
Active Matching
Abstract. In the matching tasks which form an integral part of all types of tracking and geometrical vision, there are invariably priors available on the absolute and/or relative i...
Margarita Chli, Andrew J. Davison
TVLSI
1998
83views more  TVLSI 1998»
15 years 5 months ago
Low overhead fault-tolerant FPGA systems
— Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
John Lach, William H. Mangione-Smith, Miodrag Potk...
ISLPED
1995
ACM
96views Hardware» more  ISLPED 1995»
15 years 9 months ago
Towards a high-level power estimation capability
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL. Such a high-level power estimation capability is r...
Farid N. Najm