64 search results - page 12 / 13 » An algorithm for power estimation in switched-capacitor circ... |
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
FPGA
1999
ACM
13 years 11 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
GLVLSI
2010
IEEE
13 years 7 months ago
2010
IEEE
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
ICCD
2008
IEEE
14 years 1 months ago
2008
IEEE
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...