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VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
14 years 1 months ago
Improved Effective Capacitance Computations for Use in Logic and Layout Optimization
We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...
Andrew B. Kahng, Sudhakar Muddu
ISPD
1998
ACM
99views Hardware» more  ISPD 1998»
14 years 1 months ago
New efficient algorithms for computing effective capacitance
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
Andrew B. Kahng, Sudhakar Muddu
ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 6 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
CPM
2007
Springer
134views Combinatorics» more  CPM 2007»
14 years 1 months ago
Efficient Computation of Substring Equivalence Classes with Suffix Arrays
This paper considers enumeration of substring equivalence classes introduced by Blumer et al. [1]. They used the equivalence classes to define an index structure called compact dir...
Kazuyuki Narisawa, Shunsuke Inenaga, Hideo Bannai,...
ICCL
1998
IEEE
14 years 1 months ago
Loop Optimization for Aggregate Array Computations
An aggregate array computation is a loop that computes accumulated quantities over array elements. Such computations are common in programs that use arrays, and the array elements...
Yanhong A. Liu, Scott D. Stoller