443 search results - page 2 / 89 » An interconnection architecture for micropayment systems |
CDES
2006
14 years 17 days ago
2006
: As we continue miniaturization of circuits into nano-scale, interconnects have been recognized as the limiting factor for next generation of computing structures. To increase the...
OTM
2009
Springer
14 years 5 months ago
2009
Springer
This paper proposes new protocols for the interconnection of FIFO- and causal-ordered broadcast systems, thus increasing their scalability. They use several interconnection links b...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
This paper deals with alternative server memory architecture options in multicore CPU generations using optically-attached memory systems. Thanks to its large bandwidth-distance p...
DATE
2000
IEEE
14 years 3 months ago
2000
IEEE
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
TVLSI
2010
13 years 5 months ago
2010
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...