3120 search results - page 5 / 624 » An optimal architecture for a DDC |
DAC
1992
ACM
13 years 10 months ago
1992
ACM
ISSS
1995
IEEE
13 years 10 months ago
1995
IEEE
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
ISSS
1997
IEEE
13 years 10 months ago
1997
IEEE
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
CAD
2002
Springer
13 years 6 months ago
2002
Springer
This paper discusses product variety design under optimization viewpoint. Product variety design means the challenge to simultaneously design multiple products toward higher optim...
ASPDAC
2007
ACM
13 years 10 months ago
2007
ACM
Abstract-- This paper proposes a novel power-aware multifrequency wrapper architecture design to achieve at-speed testability. The trade-offs between power dissipation, scan time a...