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» Analog Hardware Model for Morphological Neural Networks
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ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
14 years 1 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri
ESANN
2006
13 years 9 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
ICES
2003
Springer
111views Hardware» more  ICES 2003»
14 years 26 days ago
Spiking Neural Networks for Reconfigurable POEtic Tissue
Abstract. Vertebrate and most invertebrate organisms interact with their environment through processes of adaptation and learning. Such processes are generally controlled by comple...
Jan Eriksson, Oriol Torres, Andrew Mitchell, Gayle...
NIPS
2008
13 years 9 months ago
On Computational Power and the Order-Chaos Phase Transition in Reservoir Computing
Randomly connected recurrent neural circuits have proven to be very powerful models for online computations when a trained memoryless readout function is appended. Such Reservoir ...
Benjamin Schrauwen, Lars Buesing, Robert A. Legens...
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
14 years 2 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li