— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
—The advanced sampling and variance reduction techniques as efficient alternatives to the slow crude-MC method have recently been adopted for the analysis of timing yield in dig...
Temporal derivatives are computed by a wide variety of neural circuits, but the problem of performing this computation accurately has received little theoretical study. Here we sy...
In 1986, Franceschini et al. built an optronic velocity sensor [11], the principle of which was based on the findings they had recently made on fly EMDs by performing electrophysio...
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...