20 search results - page 3 / 4 » Analysis, reduction and avoidance of crosstalk on VLSI chips |
DAC
1998
ACM
14 years 8 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
GLVLSI
2010
IEEE
14 years 26 days ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Continuous scaling of VLSI circuits is reducing gate delays but rapidly increasing interconnect delays. Semiconductor Industry Association (SIA) roadmap predicts that, beyond the ...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...