118 search results - page 8 / 24 » Analysis and modeling of CD variation for statistical static... |
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
ISQED
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper discusses clock skew due to manufacturing variability and environmental change. In clock tree design, transition time constraint is an important design parameter that c...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied ...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...