115 search results - page 19 / 23 » Analysis and optimization of gate leakage current of power g... |
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
The impact of power supply integrity on a design has become a critical issue, not only for functional verification, but also for performance verification. Traditional analysis has...
ASPDAC
2007
ACM
13 years 12 months ago
2007
ACM
Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power suppl...
GLVLSI
2000
IEEE
14 years 8 days ago
2000
IEEE
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
We propose a novel design flow for mismatch and processvariation aware optimization of nanoscale CMOS Active Pixel Sensor (APS) arrays. As a case study, an 8 × 8 APS array is de...