562 search results - page 94 / 113 » Analysis of Hardware Acceleration in Reconfigurable Embedded... |
DATE
2008
IEEE
2008
IEEE
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
14 years 2 months ago
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
One of the security issues in embedded system is the ability of an adversary to perform side channel attacks. Power analysis attacks are often very successful, where the power seq...
RTSS
2008
IEEE
14 years 2 months ago
2008
IEEE
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
GLVLSI
2010
IEEE
13 years 9 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
ISCA
2003
IEEE
14 years 29 days ago
2003
IEEE
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...