6 search results - page 1 / 2 » Analysis of Reconfigurable Logic Blocks for Evolvable Digita... |
EVOW
2008
Springer
14 years 19 days ago
2008
Springer
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
MJ
2006
13 years 10 months ago
2006
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
SBCCI
2006
ACM
14 years 4 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
FPL
2010
Springer
13 years 9 months ago
2010
Springer
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...