422 search results - page 18 / 85 » Application mapping for chip multiprocessors |
144
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SC
2009
ACM
15 years 11 months ago
2009
ACM
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
137
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IEEEPACT
2009
IEEE
15 years 11 months ago
2009
IEEE
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
125
Voted
ICCD
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
140
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ICS
2011
Tsinghua U.
14 years 7 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
129
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DFT
1999
IEEE
15 years 8 months ago
1999
IEEE
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...