86 search results - page 7 / 18 » Application-Specific Computing with Adaptive Register File A... |
DAC
2009
ACM
14 years 8 months ago
2009
ACM
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
MICRO
2000
IEEE
13 years 7 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
ICS
2007
Tsinghua U.
14 years 1 months ago
2007
Tsinghua U.
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
Several manufacturers have recently announced the first simultaneous-multithreaded processors, both as single CPUs and as components of multi-CPU chips. All are small scale, compr...
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...