Sciweavers

1398 search results - page 245 / 280
» Application-Specific Integrated Circuits
Sort
View
ISMVL
2000
IEEE
124views Hardware» more  ISMVL 2000»
14 years 5 days ago
Silicon Single-Electron Devices and Their Applications
We have developed two novel methods of fabricating very small Si single-electron transistors (SETs), called PAtternDependent OXidation (PADOX) and Vertical PAttern-Dependent OXida...
Yasuo Takahashi, Akira Fujiwara, Yukinori Ono, Kat...
ITC
2000
IEEE
101views Hardware» more  ITC 2000»
14 years 5 days ago
Which concurrent error detection scheme to choose ?
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
Subhasish Mitra, Edward J. McCluskey
ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
14 years 3 days ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
FPGA
1997
ACM
132views FPGA» more  FPGA 1997»
13 years 12 months ago
Wormhole Run-Time Reconfiguration
Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and ra...
Ray Bittner, Peter M. Athanas
ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
13 years 11 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson