A new computational concept of timing jitter is proposed that is suitable for exploitation in circuit simulators. It is based on the approximation of computed noise characteristic...
Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulya...
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
— This work is part of a project that aims to develop and operate integrated evolvable hardware systems using unconstrained evolution. Experiments are carried out on an evolvable...
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...