111 search results - page 18 / 23 » Approximating Low Latency Queueing Buffer Latency |
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...
MICRO
2002
IEEE
14 years 18 days ago
2002
IEEE
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...
DC
2008
13 years 7 months ago
2008
This paper introduces solo-valency, a variation on the valency proof technique originated by Fischer, Lynch, and Paterson. The new technique focuses on critical events that influe...
MICRO
2003
IEEE
14 years 29 days ago
2003
IEEE
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
SIGCOMM
2012
ACM
11 years 10 months ago
2012
ACM
Today’s data centers face extreme challenges in providing low latency. However, fair sharing, a principle commonly adopted in current congestion control protocols, is far from o...