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DAC
2009
ACM
14 years 10 months ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...
DAC
2008
ACM
14 years 10 months ago
Construction of concrete verification models from C++
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
Malay Haldar, Gagandeep Singh, Saurabh Prabhakar, ...
DAC
2000
ACM
14 years 9 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy
DAC
2002
ACM
14 years 9 months ago
A solenoidal basis method for efficient inductance extraction
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
Hemant Mahawar, Vivek Sarin, Weiping Shi
DAC
2002
ACM
14 years 9 months ago
Watermarking integer linear programming solutions
Linear programming (LP) in its many forms has proven to be an indispensable tool for expressing and solving optimization problems in numerous domains. We propose the first set of ...
Seapahn Megerian, Milenko Drinic, Miodrag Potkonja...