37 search results - page 4 / 8 » Architectural Exploration Using Verilog-Based Power Estimati... |
SIPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
SAMOS
2004
Springer
14 years 23 days ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
PATMOS
2000
Springer
13 years 11 months ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
EWSN
2007
Springer
14 years 7 months ago
2007
Springer
This paper presents two lifetime models that describe two of the most common modes of operation of sensor nodes today, triggerdriven and duty-cycle driven. The models use a set of ...