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GLVLSI
2010
IEEE
187views VLSI» more  GLVLSI 2010»
14 years 25 days ago
Write activity reduction on flash main memory via smart victim cache
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
Liang Shi, Chun Jason Xue, Jingtong Hu, Wei-Che Ts...
ISLPED
2000
ACM
77views Hardware» more  ISLPED 2000»
14 years 11 days ago
A recursive algorithm for low-power memory partitioning
Memory-processor integration o ers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently acc...
Luca Benini, Alberto Macii, Massimo Poncino
TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
14 years 2 months ago
Architectural support for low overhead detection of memory violations
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect me...
Saugata Ghose, Latoya Gilgeous, Polina Dudnik, Ane...
DAC
2011
ACM
12 years 7 months ago
Process-level virtualization for runtime adaptation of embedded software
Modern processor architectures call for software that is highly tuned to an unpredictable operating environment. Processlevel virtualization systems allow existing software to ada...
Kim M. Hazelwood