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CODES
2007
IEEE
13 years 11 months ago
A computational reflection mechanism to support platform debugging in SystemC
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
Bruno Albertini, Sandro Rigo, Guido Araujo, Cristi...
IJES
2008
101views more  IJES 2008»
13 years 7 months ago
The Artemis workbench for system-level performance evaluation of embedded systems
In this article, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of ...
Andy D. Pimentel
SBACPAD
2008
IEEE
206views Hardware» more  SBACPAD 2008»
14 years 1 months ago
A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
Thiago S. M. C. de Farias, Mozart W. S. Almeida, J...
IPPS
2006
IEEE
14 years 1 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
DAC
2008
ACM
14 years 8 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu